AD9850BRSZ TQFP-64 programmable circuit board , Flash ic integrated circuit CMOS

AD9850BRSZ

CMOS, 125 MHz Complete DDS Synthesizer

FEATURES

125 MHz Clock Rate On-Chip High Performance

DAC and High Speed Comparator DAC SFDR > 50 dB @ 40 MHz

AOUT 32-Bit Frequency Tuning Word Simplified Control Interface: Parallel Byte or Serial Loading Format Phase Modulation Capability 3.3 V or 5 V

Single-Supply Operation Low Power: 380 mW @ 125 MHz (5 V)

Low Power: 155 mW @ 110 MHz (3.3 V)

Power-Down Function Ultrasmall

28-Lead SSOP Packaging

APPLICATIONS

Frequency/Phase—Agile Sine Wave Synthesis Clock Recovery and Locking Circuitry for Digital Communications Digitally Controlled ADC Encode Generator Agile Local Oscillator Applications

ABSOLUTE MAXIMUM RATINGS*

Maximum Junction Temperature . . . . . . . . . . . . . . . . 150°C

VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 V

Digital Inputs . . . . . . . . . . . . . . . . . . . . . . . . . –0.7 V to +VS

Digital Output Continuous Current . . . . . . . . . . . . . . . 5 mA

DAC Output Current . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA

Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C

Operating Temperature . . . . . . . . . . . . . . . . . –40°C to +85°C

Lead Temperature (Soldering 10 sec) . . . . . . . . . . . . . 300°C

SSOP θJA Thermal Impedance . . . . . . . . . . . . . . . . . . 82°C/W

GENERAL DESCRIPTION The AD9850 is a highly integrated device that uses advanced DDS technology coupled with an internal high speed, high performance D/A converter and comparator to form a complete, digitally programmable frequency synthesizer and clock generator function. When referenced to an accurate clock source, the AD9850 generates a spectrally pure, frequency/phase programmable, analog output sine wave. This sine wave can be used directly as a frequency source, or it can be converted to a square wave for agile-clock generator applications. The AD9850’s innovative high speed DDS core provides a 32-bit frequency tuning word, which results in an output tuning resolution of 0.0291 Hz for a 125 MHz reference clock input. The AD9850’s circuit architecture allows the generation of output frequencies of up to one-half the reference clock frequency (or 62.5 MHz), and the output frequency can be digitally changed (asynchronously) at a rate of up to 23 million new frequencies per second. The device also provides five bits of digitally controlled phase modulation, which enables phase shifting of its output in increments of 180°, 90°, 45°, 22.5°,

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